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ESH10000556 - Battery Simulator

ESH10000556 – Battery Simulator Board

Product Brief

The ESH10000556 is a galvanically isolated, programmable power output module designed to emulate battery behavior in production and validation test environments. It provides a controlled, isolated voltage and current output with integrated measurement and protection, enabling safe and repeatable testing of battery-powered devices without physical batteries.

Key use cases:

  • Battery emulation during functional production testing

  • Battery cycle testing

  • Automated test fixture integration

  • Design verification — voltage margin, power cycling, current limit validation

  • Service and maintenance diagnostics


Datasheet

Parameter

Value

Input interface

Expand Interface

Output voltage range

0 V – 10 V

Maximum output current

1 A

Output mode

Regulated voltage with constant current limit

Output type

Programmable sink / source (bidirectional)

Isolation

Galvanic (isolated DC/DC + digital isolators)

Control interface

I²C

DAC/ADC channels (isolated side)

8 × programmable, 0–5 V

Overcurrent protection

Yes — detection and shutdown


Manual

Hardware Setup

The board is powered via the Expand Interface, which provides the input supply. Connect the DUT to the isolated output terminals. The galvanic isolation barrier separates the input supply domain from the DUT-facing output domain — no additional isolation is required on the DUT side.

Software Control

The board is controlled over I²C. The following parameters are programmable:

  • Output voltage — set within 0 V to 10 V

  • Current limit — set up to 1 A (constant current mode activates automatically when the limit is reached)

  • Output enable / disable

The board also exposes 8 programmable DAC/ADC channels on the isolated side for auxiliary signal control and measurement.

Measurement

The following values can be read back over I²C:

  • Output voltage

  • Source current

  • Sink current

Use these for closed-loop control, logging, or pass/fail evaluation in automated test sequences.

Protection

Overcurrent events trigger an automatic shutdown. The host must clear the fault and re-enable the output after an overcurrent event. [TODO: document fault register address and clear procedure]


Pinout

J1 – Output Connector (Phoenix / Power)

Pin

Signal

Description

1

VOUT+

Isolated output voltage

2

GND

Isolated output ground

J2 – Isolated I/O Header (2×6 Pin Header)

Provides access to the 8 programmable DAC/ADC channels on the isolated side of the board.

Pin

Signal

Pin

Signal

1

5V

2

12V

3

MPIO0

4

MPIO4

5

MPIO1

6

MPIO5

7

MPIO2

8

MPIO6

9

MPIO3

10

MPIO7

11

GND

12

GND

J3 – Expand Interface (M8)

Pin

Signal

Description

1

GND

Non-isolated ground

2

I2C-LR+

I²C Long Range, differential line (+)

3

VIN

Input voltage

4

I2C-LR−

I²C Long Range, differential line (−)

Note: The Expand Interface uses I²C Long Range (I²C LR) — a differential variant of I²C that embeds clock in the data signal. It is not compatible with standard I²C (SDA/SCL).